CrazyEngineers Forum - Electrical & Electronics Engineering |
Xilinx CPLD, decoupling capacitors Posted: 28 Apr 2011 04:17 PM PDT Hi Everyone, I am working on a small PCB with a Xilinx CPLD xc95288xl on it; it will be a part of a switchboard matrix for an FPGA based multiprocessor which I am working on as a hobbyist. I would like to have your help on this problem: should each Vccint and also Vccio pin have decoupling capacitors ? Xilinx in his 'xapp112' application note says: decouple all device Vcc pins (maybe it refers only to Vccint pins ...) Does any one have direct experience ? Thank you. |
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