Wednesday, September 1, 2010

CrazyEngineers Forum - Electrical & Electronics Engineering

CrazyEngineers Forum - Electrical & Electronics Engineering


Mobile phones in a petrol bink

Posted: 01 Sep 2010 12:27 AM PDT

We often see petrol bunks carrying the sign, "Please switch offf your mobile phones".. How come the concept of EM waves pose a threat to petrol? :confused:

VLSI Problem - Need Solution

Posted: 31 Aug 2010 10:54 AM PDT

Design a CMOS inverter chain as a clock buffer which drives the first stage of clock tree with equivalent interconnect parasitic capacitance of 1nF. The input gate capacitance of the inverter is 50fF. Device model parameter and unit equivalent resistance (average equivalent resistance may be used) can be found in the unified model. The unit capacitance is 15fF and gamma(r) = 1.

(1) Find the number of stages required when the effective fan-out are e, 4 and 6,respectively. Calculate the corresponding inverter chain delay.

(2) Which case in (1) gives the lowest path delay? Estimate the W of the last inverter in the chain (L=0.25mm). Assume that the first inverter has device sizesof W/L=2 for PMOS and W/L=1 for NMOS.

(3) Estimate the total dynamic power dissipation if the clock frequency is 1GHz and VDD = 2.5V

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P.S. I need the solution for part (b).. Getting absurd result.. Tried everywhere on my own... Finally to CE :)

Cheers,
Prakash

Controller circuit for automatic surge flow irrigation

Posted: 31 Aug 2010 09:30 AM PDT

hi members,
i need the circuit diagram and components for building a controller circuit for automatic surge flow irrigation .does any one suggest me where i can get the circuit diagram:smile:

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